岗位职责:
1. Responsible for developing digital designs with emphasis on backend, including Synthesis, DFT, Floor-plan, power planning, Place, CTS, Route.
2. Work with Front-end designers to optimize timing/area/power of the design implementation and perform static timing analysis.
3. Optimization and Verification of layout for tape-out (including RC extraction, ECO, DRC, LVS).
4. Power IR drop analysis and optimization, area and parasitic layout optimization, chip size optimization.
5. Static Timing analysis (Prime Time) and setup/hold fix.
5. Formal Verification for equivalence checking (Formality).
7. Generation of fill structures according to technology requirements.
任职要求:
1. at least 1 years experience in backend design flow (APR) with proven SOC tape-out experience.
2. Scripts based on makefile, perl, TCL or csh/tcsh
3. Logic synthesis or physical Synthesis(Design Compiler)
4. Static timing analysis (Primetime)
5. Experienced in Synopsys/Cadence automatically physical implementation tools and flows (IC-Compiler/ Astro / SOC-Encounter/ Milky-way/ Star-RCX) is a plus.
6. Experience with one or more scripting languages (Perl, TCL, or Shell) to make reusable automatically flow is a plus.
7. Experience and knowledge about FE design (RTL code, flow) and verification is a plus.
8. Good analytical and debugging skills.

上海磐启微电子有限公司是国内从事无人机、物联网、无线通信芯片及系统解决方案的领先企业，主要产品有SUB-1G无线芯片、2.4GHz无线芯片、多点和单点触控芯片、物联网、无人机及先进解决方案。2016年销售额超过亿元人民币。公司总部座落在上海张江高科技园区，在苏州工业园区内设立了研发中心，在深圳设立了分公司。
公司产品包括电容式触控芯片系列及无线芯片系列； 其中电容式触控芯片系列具有高精度、低功耗的特点，支持包括手机等多种类型触控屏；无线芯片产品系列覆盖了315M/433M/868M/915M/2.4GHz/5.8GHz等多个频段，在无线鼠标键盘、遥控玩具、智能家居、物联网等方面都有广泛应用。
国内领先，走向世界。苏州磐启微电子以发展领先的集成电路产业为己任，力争成为国际一流的集成电路企业集团。